1. Field of the Invention
The present invention relates generally to substrate surface cleaning and, more particularly, to a method and apparatus for improving semiconductor substrate cleaning following fabrication processes.
2. Description of the Related Art
As is well known to those skilled in the art, the fabrication of semiconductor devices involves numerous processing operations. These operations include, for example, impurity implants, gate oxide generation, inter-metal oxide depositions, metallization depositions, photolithography patterning, etching operations, chemical mechanical polishing (CMP), etc. Typically, these operations generate contaminants such as particles, residue, or absorbed components (e.g., chemicals), which are adhered to the wafer surface and/or wafer topography features. It is well established that contaminants should be removed as the presence of such contaminants has detrimental effects on the performance of the integrated circuit devices. To achieve this task, wafer surfaces and topography features are cleaned so as to dislodge and remove contaminants.
Common cleaning operations may involve brush scrubbing of the wafer surfaces wherein the wafer surfaces are cleaned purely by applying mechanical energy. Another widely use cleaning operation involves megasonic cleaning of the wafer surfaces in order to dislodge any adhered contaminants.
The brush scrubbing operation is usually performed by either a double-sided horizontal wafer scrubber or horizontal wafer scrubber designed to clean top and bottom surfaces of a wafer. Top and bottom surfaces of the wafer are brushed by a pair of brushes, each mounted on a corresponding brush core. Each of the brush cores includes a respective shaft, each connected to a fluid inlet. The outer surfaces of the brushes are typically covered with a plurality of nodules. The wafer is engaged by a pair of rollers while the top and bottom surfaces of the wafer are scrubbed by the brushes. The wafer is cleaned as the brushes come in contact with top and bottom surfaces of the wafer, thus removing the contaminants.
FIG. 1A shows a simplified, partial, exploded, cross sectional view of an exemplary prior art brush scrubbing operation. A brush 12 having a plurality of nodules 14 is shown to be applied to the wafer surface 8′ so as to clean planer surface as well as the topography features 8a–8d defined on the wafer surface 8′. As can be seen, a plurality of contaminants 10a–10f is adhered to the planer surface of the wafer surface 8′ or in deep topography features 8a–8d. For instance, contaminants 10a, 10b, 10d, and 10e are adhered to the planer surface of the wafer surface 8′ while contaminant 10c is adhered inside the feature 8b, and contaminant 10f is adhered inside the feature 8d. 
Normally, wafer surface 8′ is brush scrubbed using chemicals so as to remove any contaminants adhered to the wafer surface 8′. The wafer surface 8′ is then rinsed by flushing the wafer surface 8′ with DI water, thus disposing the contaminant 10a–10e. At this point, the cleaned wafer is removed from the brush scrubber, allowing the next wafer to be placed in the brush scrubber. In this fashion, each wafer is scrubbed and rinsed in the prior art brush box.
Unfortunately, brush scrubbing operations can generally only dislodge contaminants defined on planer surfaces, i.e., 10a, 10b, 10d, and 10e. This occurs as the brush materials 12 may not penetrate through very high aspect ratio features 8a–8d (e.g., trenches and vias, etc.) so as to clean contaminants 10c and 10f defined deep within the features. As a result, brush scrubbing operations may exhibit a rather poor cleaning capacity when cleaning surface topography features such as trenches or vias open to the wafer surface 8′. For instance, at the conclusion of the brush scrubbing operation, contaminants defined on the planer surface of the wafer surface (i.e., 10a, 10b, 10d, and 10e) have been removed while, in some cases, contaminants 10c and 10f may still remain adhered to the wafer surface 8′. In some circumstance, this limitation associated with brush scrubbing operations becomes more noticeable as the feature sizes get smaller (e.g., smaller than 0.2 microns). As can be appreciated, smaller feature sizes may prevent penetration of the brush material into the topography features, thus limiting or blocking access to the contaminants lodged therein.
Another commonly used cleaning operation is cleaning of wafer surface 8′ using a megasonic cleaner shown in the simplified, partial, exploded, cross sectional view of FIG. 1B, in accordance with the prior art. As shown, a megasonic transducer is fabricated using a plurality of crystals 32 of piezoelectric material bonded to a resonator 30. The crystals 32 are powered, thus causing the resonator 30 to vibrate. The vibration of the high frequency acoustic energy transducer creates sonic pressure waves in the liquid medium or the meniscus present. In this manner, contaminants 10a–10f are expected to be removed by cavitation and sonic agitation generated in the high frequency acoustic energy cleaner.
Megasonic cleaning has proven to be more than reliable in cleaning and dislodging contaminants defined deep into the topography features 8a–8d defined on the wafer surface 8′. However, megasonic cleaning may achieve an inadequate cleaning of the planer surfaces. By way of example, contaminant 10c lodged deep into the feature 8b and contaminant 10f lodged into the feature 8d are easily dislodged and removed by megasonic cleaning. Contaminants 10a, 10b, 10d, and 10e, nevertheless may still remain on the wafer surface 8′ subsequent to the megasonic cleaning. Furthermore, as shown, megasonic cleaning may not be capable of dislodging contaminants pressed onto the wafer surface 8′, such as contaminant 10d. 
In an attempt to compensate the limitations associated with either brush scrubbing or megasonic cleaning operations, typical wafer cleaning processes of the prior art involve performing cleaning operations in multiple stand alone modules in a given order. For instance, as shown in FIG. 1C, the prior art cleaning operation starts by brush scrubbing wafer surfaces in a stand alone brush box 2 for a specific period of time subsequent to which the cleaned wafer is removed from the brush box 2 and transferred into the stand alone megasonic cleaner 4. At this point, the wafer surfaces are cleaned in the stand alone megasonic cleaner 4 for a particular time after which the cleaned wafer is transferred to a spin, rinse, and dry (SRD) module 6. Next, the wafer is spin-rinsed and dried. In this fashion, each wafer is scrubbed, megasonically cleaned, and spin-rinsed in accordance with the prior art.
As can be appreciated, each wafer has to be brush scrubbed, megasonically cleaned, and spin rinsed, separately and for a corresponding period of time, in three different stand alone modules, thus making the cleaning process of the prior art an extended and lengthy process. Prolonging the cleaning period even more is the transition time necessary for removing and transferring of wafers between the stand alone modules. In this manner, the cleaning cycle for each wafer is significantly and unnecessarily increased. As can be appreciated, this reduces the overall wafer throughput.
In view of the foregoing, a need therefore exists in the art for a method and apparatus capable of producing a substantially clean patterned and/or unpatterned semiconductor substrate, while maximizing cleaning efficiency and minimizing semiconductor substrate cleaning cycle.